An Unbiased View of Anti-Tamper Digital Clocks
An Unbiased View of Anti-Tamper Digital Clocks
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seventeen. The equipment for detecting clock tampering as defined in claim 15, wherein the Appraise circuit is brought on by a clock edge at an conclusion in the clock Appraise time period.
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thirty. An apparatus for detecting voltage tampering, comprising: signifies for supplying a steady-state monotone signal through an evaluate time frame;
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The water amount amount could be established according to delayed monotone signals from a number of prior Assess time. The plurality of resettable delay line segments may comprise taps together a delay line. Alternatively, the plurality of resettable delay line segments comprises parallel delay strains.
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a plurality of resettable delay line segments that delay the monotone sign to deliver a respective plurality of delayed monotone signals Every owning both a 1 or perhaps a zero logic price, whereby resettable delay line segments involving a resettable delay line segment associated with a minimal delay time plus a resettable hold off line phase connected to a optimum delay time are Just about every related to discretely raising delay moments; and
nine. The equipment for detecting clock tampering as described in declare eight, additional comprising: indicates for resetting the suggests for delaying the monotone signal all through a reset period of time, wherein the reset time period is ahead of the clock Consider time frame.
39. The apparatus for detecting voltage tampering as outlined in assert 37, whereby the Examine circuit is induced by a clock edge at an stop of the Consider period of time.
24. The tactic for detecting voltage tampering as outlined in declare 23, more comprising: resetting the resettable hold off line segments throughout a reset period of time, whereby the reset period of time is ahead of the Assess period of time.
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The reset time period may very well be just before the clock Assess time frame 310. Utilizing the clock CLK to cause the Assess circuit 240 could use a clock edge at an finish on the clock Examine time period to bring about the Assess circuit.